In today’s electronic engineering landscape, the demand for high-speed design has never been higher. With interfaces like USB-C, WIFI, DDR, MIPI, and others becoming cornerstones of tomorrow’s products, designers need to have an understanding of what high-speed signals are and the challenges they pose.
In this series we will delve into some of the important considerations required to make these designs successful.
Welcome back to our series on High Speed PCB design. In the previous article, we explored some tips for high speed routing. In this article, we will address some common mistakes that designers make so you can avoid them in your next design.
Forgetting Return Vias
Diagram of changing layers.Any time a high speed signal changes layers, it’s important to consider the ground path. In a well designed stack-up, each layer should have an associated ground plane for return currents. When a signal changes layers, the return current wants to change layers as well.
This example below shows a board with a differential pair routed on the top and changing layers to the bottom. When this change occurs, it is important to provide a GND via in close proximity for the GND current to flow from L2 to L11. In the event that one of the two reference planes is power and they cannot be connected directly, an AC current path can be provided instead via a decoupling capacitor.
Crossing Ground Gaps
Mitigating signal loss over ground splits.Ground splits can be a useful tool for isolating noise, however, it is important to make sure that any high speed signal never crosses them.
Consider this diagram. The connector at the top left is the source and the resistor R is the load. The green area is the ground plane which has a gap in the center. If the signal trace is routed over the gap, the return current is forced to divert and the total loop is large. If the signal stays over the ground plane, the return current can run directly underneath and minimize loop area.
Discontinuities in the reference plane can result in poor signal integrity as well as unwanted noise and electromagnetic emissions.
Overlooking Terminations
Signal termination is an essential tool in the engineer’s tool kit. It can prevent reflections and promote signal integrity.
Series termination involves placing a resistor in series with the signal line near the source. This resistor, typically matched to the trace impedance, helps dampen reflections by reducing the signal amplitude gradually as it travels down the line.
Parallel termination places a resistor at the end of the signal line, matching the trace impedance to ground or a reference voltage, thereby absorbing reflections at the receiver end.
AC termination combines a resistor and capacitor in series at the end of the line. The resistor matches the impedance while the capacitor blocks DC, making it suitable for AC-coupled signals.
Each method is chosen based on the specific needs of the circuit, balancing factors like power consumption, signal integrity, and routing complexity. Many modern chipsets have built in terminations. Sometimes multiple terminations are selectable in the device firmware. Make sure to check the datasheet to see what is available to you.
Examples of Porticos projects utilizing PCB layouts.
Not Shielding Long Runs
It is important to avoid long unshielded runs. High-speed traces are susceptible to RF interference, but they can also be very strong emitters, causing the product to fail FCC radiated emissions testing.
We recommend routing longer runs internally to take advantage of shielding on both sides. That said, an internal trace routed close to the board edge can radiate noise. While it’s always best to keep high speed traces away from the edges, sometimes design constraints require it. Adding stitching vias around the perimeter can be a good way to minimize emissions. A good rule of thumb for spacing stitching vias is roughly 10% of the signal wavelength.
Length Matching Differential Pairs Incorrectly
Length matching of differential pairs is crucial for maintaining good phase coupling, which preserves signal integrity in high-speed PCB designs.
In a differential pair, signals are transmitted as complementary waveforms, meaning one signal is the inverse of the other. To ensure that these signals remain in perfect phase opposition, it’s important to correct length mismatches as close to the source as possible. Compensating at the other end of the run can lead to timing mismatches and impede noise rejection. By carefully length-matching the traces, you minimize these issues, ensuring that the differential signals arrive at their destination simultaneously. This protect the phase relationship and enhances the pair’s ability to reject noise.
Conclusion
Routing a high-speed PCB design can be complicated. Hopefully this article will help you review your design with confidence. For more insights, stay tuned for part 5 of our series, Simulating High Speed PCB Designs to see what benefits simulation can provide and find the best tool for the job.
Would you like additional confidence that your PCB bring up will be successful? Remember that Porticos has a team of engineers to help you with your design and implementation. Get in touch to learn more.
